許健 | Gene Sheu
姓名 許健 | Gene Sheu
系所 資訊工程學系 兼任講座教授
經歷 .亞洲大學資訊工程學系教授
.中央研究院分子生物研究所博士後研究員
.大眾電腦股份有限公司執行副總經理
.工業技術研究院電子工業研究所研究員
.國立清華大學材料科學工程所兼任副教授
年度 論文名稱
2016 Rava Deva(Rava Deva)*、許健(Gene Sheu)、楊紹明(Shao-Ming Yang), Fundamentals of side isolation LDMOS device with 0.35um CMOS compatible process -, e Manufacturing and design collaboration symposium 2016, vol.2016, 2016
2016 Aanand(Aanand)*、許健(Gene Sheu)、syed、Shao wei Lu, Gate Engineering in SOI LDMOS for Device Reliability, MATEC Web of Conferences matec , 2016, vol.2016 no.44, 2016
2015 ARYADEEP、許健(Gene Sheu)、楊紹明(Shao-Ming Yang)、AUNNY、王俊博、Amanulla, Optimization of Holding Voltage for 5V multi-finger NMOS using Voltage stepping simulation, Applied Mechanics and Materials, vol.2015 no.april pp.526-529, 2015
2015 Vivek、Antonious、許健(Gene Sheu)、erry、楊紹明(Shao-Ming Yang), Simulation of P-type Doping Profile Prediction Using.Applied Mechanics and Materials, Applied Mechanics and Materials, vol.2015 no.APRIL pp.530-535=4, 2015
2015 陳坤成(James K.C. Chen)、sl lee、Batchuluun、許健(Gene Sheu), TRIPLE HELIX THEORY OF MANAGEMENT OF TECHNOLOGY EDUCATION (MOTE): AN, International Association for Management of Technology, vol.2015 no.3 pp.2687-2696, 2015
2015 蔡宗叡(TSAI, JUNG-RUEY)、楊紹明(Shao-Ming Yang)、許健(Gene Sheu), Reliability Analysis of Amorphous Silicon Thin-Film Transistors during Accelerated ESD, International Symposium on the Physical and Failure Amalysis of Integrated Circuits, vol.2015 pp.318-321, 2015
2015 楊紹明(Shao-Ming Yang)、P.A Chen、許健(Gene Sheu), A NOVEL HSPICE MACRO MODEL FOR THE ESD BEHAVIOR BEHAVIOR BEHAVIOR BEHAVIOR OF GATE, ECS Transactions, vol.Mar no.1 pp.1-5, 2015
2015 S.L Shy、許健(Gene Sheu)、楊紹明(Shao-Ming Yang)、M.C Chen, .Negative e-beam resists using for nano-imprint lithography and silicone mold fabricatio, Proceedings of SPIE - The International Society for Optical Engineering, vol.9423 no.M pp.1-5, 2015
2015 楊紹明(Shao-Ming Yang)、hema、aryadeep、許健(Gene Sheu), HIGH VOLTAGE VOLTAGE VOLTAGE NLDMOS WITH MULTIPLE-RESURF MULTIPLE-RESURF MULTIPLE-RESURF ULTIPLE-RESURF STRUCTURE STRUCTURE STRUCTURE TRUCTURE TO, ECS Transactions, vol.2015 no.Mar, 2015
2015 Vivek Ningaraju、Antonius Fran Yannu Pramudyo、許健(Gene Sheu)、Erry Dwi Kurniawan、楊紹明(Shao-Ming Yang)、Jia-Wei Ma、Subramanyaj, Simulation of P-type Doping Profile Prediction Using, Applied Mechanics and Materials, vol.764-765 no.2015 pp.530-534, 2015
2015 Vivek Ningaraju、楊紹明(Shao-Ming Yang)、許健(Gene Sheu)、Md.Amanullah4、Erry Dwi Kurniawan、Subramanyaj6, Improvement of On-Resistance Degradation Induced by Hot Carrier, Applied Mechanics and Materials, vol.764-765 no.2015 pp.521-525, 2015
2014 Rahul Kumar、EmitaYulia Hapsari、許健(Gene Sheu)、楊紹明(Shao-Ming Yang)、, Anil Kumar TV, A Novel Ultra High Voltage Sidewall Implant Super Junction MOSFET Using Arsenic Implantation under Trench Bottom, IEEE Nanotechnology Materials and Device Conference 2013, vol.2013 pp.84-87, 2014
2014 Aryadeep Mrinal、Vijay Kumar M P、Vivek N, Manjunatha M、許健(Gene Sheu)、楊紹明(Shao-Ming Yang), Optimization of SiC Schottky Diode using Linear P-top for Edge, IEEE Nanotechnology Materials and Device Conference 2013, vol.2013 pp.24-27, 2014
2014 Anil Kumar T V、楊紹明(Shao-Ming Yang)、許健(Gene Sheu)、P.A Chen, A Low-cost 900V rated Multiple RESURF LDMOS Ultrahigh-Voltage Device MOS Transistor Design without EPI Layer, ECS Transactions, vol.60 no.1 pp.97-102, 2014
2014 Anil Kumar T V、Min-Cheng Chen、許健(Gene Sheu)、楊紹明(Shao-Ming Yang), High Performance Gallium Nitride GAA Nanowire with 7nm diameter for Ultralow-Power Logic Applications, ECS Transactions, vol.60 no.1 pp.1045-1050, 2014
2014 Erry Dwi Kurniawan、Antonius Fran Yannu Pramudyo、, Ankit Kumar、楊紹明(Shao-Ming Yang)、許健(Gene Sheu), Investigation of Current Density and Hotspot Temperature Distribution Effects on P-channel LDMOSFET Unclamped Inductive Switching (UIS) Test, ECS Transactions, vol.60 no.1 pp.939-944, 2014
2014 Vivek、pradahana、許健(Gene Sheu)、王俊博、Subramaya、Amanullah、Sharma、楊紹明(Shao-Ming Yang), An Accurate Prediction for as-Implanted Doping Profile Calibration Using Different Ion Implantation, 2014 IEEE 8th International Power Engineering and Optimization Conference (PEOCO2014), Langkawi, The Jewel of Kedah, vol.2014 pp.408-412, 2014
2014 Hema、許健(Gene Sheu)、aryadeep、楊紹明(Shao-Ming Yang), A Study of Interstitial Effect on UMOS Performance, 2014 IEEE 8th International Power Engineering and Optimization Conference (PEOCO2014), Langkawi, The Jewel of Kedah, vol.2014 pp.178-181, 2014
2014 hema、許健(Gene Sheu)、aryadeep、erry、楊紹明(Shao-Ming Yang)、PA chen, Optimization of NLDMOS Structure for Higher breakdown voltage and lower on-resistance, 2014 IEEE 8th International Power Engineering and Optimization Conference (PEOCO2014), Langkawi, The Jewel of Kedah, vol.2014 pp.150-153, 2014
2014 Erry、Vivek、許健(Gene Sheu)、Antonious、hema、楊紹明(Shao-Ming Yang)、P.A.Chen, Study of Different Spatial Charge Trapping distribution effect on off-state degradation, 2014 IEEE 8th International Power Engineering and Optimization Conference (PEOCO2014), Langkawi, The Jewel of Kedah, vol.2014 pp.199-203, 2014
2014 Erry Dwi Kurniawan、Antonius Fran Yannu Pramudyo、Ankit Kumar、楊紹明(Shao-Ming Yang)、許健(Gene Sheu), Investigation of Current Density and Hotspot Temperature Distribution Effects on, ECS Transactions, vol.60 no.1 pp.939-944, 2014
2013 Tingting Hua、Yufeng Guo、Ying Yu、許健(Gene Sheu)、Jiafei Yao, An Analytical Model of Triple RESURF Device with Linear P‑layer Doping Profile, IETE TECHNICAL REVIEW, vol.30 no.1 pp.31-37, 2013
2013 JiaFei Yao、Yufeng Guo、Tingting Hua、Shi Huang、Changchun Zhang、Xiaojuan Xia、許健(Gene Sheu), Novel Silicon-on-Insulator Lateral Power Device with Partial Oxide Pillars in the Drift Region, JAPANESE JOURNAL OF APPLIED PHYSICS, vol.52 no.2013 pp.014302-1-014302-, 2013
2013 Hua Ting Ting、Guo yu-feng、yu ying、許健(Gene Sheu), analytical models of lateral power devices with arbitrary vertical doping profiles in the drift region, Chinese Physics B, vol.22 no.5 pp.058501-1-058501-, 2013
2013 Manjunatha、Vasanth、anil kumar、Jaipal Kumar、楊紹明(Shao-Ming Yang)、許健(Gene Sheu)、P.A Chen, Ron Improvement with Duplex Conduction Channel, International Power engineering and optimization conference, vol.2013 no.6 pp.83-87, 2013
2013 Jaipal Reddy、Vijay Kumar M P、Shreyas、Hema E P、許健(Gene Sheu)、楊紹明(Shao-Ming Yang), Optimization of LIGBT for low forward voltage and turn off time, 2013 IEEE Symposium on Business, Engineering and Industrial Applications (ISBEIA), vol.2013 pp.152-155, 2013
2013 Emita Yu!ia Hapsari、Rahu! Kumar、許健(Gene Sheu)、楊紹明(Shao-Ming Yang), Process Integration of Best in Class Specific-on Resistance of 20V to 60V O.18J.lID Bipolar CMOS DMOS Technology, IEEE Nanotechnology Materials and Device Conference 2013, vol.2013 pp.16-19, 2013
2013 Chinmoy Khaund、Shreyas、Vijay Kumar、Neelam、Karuna、楊紹明(Shao-Ming Yang)、許健(Gene Sheu), Verification of Ruggedness and Failure in LDMOS under UIS, 2013 IEEE 7th International Power Engineering and Optimization Conference (PEOCO), vol.2013 pp.288-292, 2013
2013 Manjunatha、Vasantha Kuma、Anil Kumar、楊紹明(Shao-Ming Yang)、許健(Gene Sheu), Ron Improvement with Duplex Conduction Channel in UHV Device, 2013 IEEE 7th International Power Engineering and Optimization Conference (PEOCO), vol.2013 pp.83-86, 2013
2013 Vijay Kumar M P、Grama Srinath Shreyas、Karuna Nidhi、Neelam Agarwal、, Ankit Kumar,、許健(Gene Sheu)、楊紹明(Shao-Ming Yang), Effect of Trench Depth and Trench Angle in a High Voltage, IEEE Nanotechnology Materials and Device Conference 2013, vol.2013 pp.74-77, 2013
2012 MANOJ kUMAR、許健(Gene Sheu)、蔡宗叡(Jung-Ruey Tsai)、楊紹明(Shao-Ming Yang), A New Methodology to Investigate the Effect of Stress and Bias on 2DEG and Drain Current of AlGaN/GaN Based Heterostructure, ECS Transactions, vol.44 no.1 pp.1285-1289, 2012
2012 adarsh、anumeha、許健(Gene Sheu), Energy Capability of LDMOS as a Function of Ambient Temperature, ULIS 2012, vol.2012 pp.65-68, 2012
2012 Tingting Hua(Tingting Hua)*、Yufeng Guo,、Ying Yu、許健(Gene Sheu)、Xiaojuan Xia、Changchun Zhang, A 2‑D Analytical Model of SOI High‑voltage Devices with Dual Conduction Layers, IETE TECHNICAL REVIEW, vol.29 no.4 pp.346-354, 2012
2012 Mohammed Sadique Anwar、Prima Sukma Permata、Md. Imran Siddiqui、蔡宗叡(Jung-Ruey Tsai)、楊紹明(Shao-Ming Yang)、許健(Gene Sheu), Analysis of LDMOS for Effect of Fingers, Device-Width and Inductance on reverse recovery, Applied Mechanics and Materials, vol.229 no.231 pp.2077-2081, 2012
2012 Analysis of LDMOS for Effect of Fingers, Device-Width and Inductance, ECS Transactions, vol.229 no.231 pp.2077-2081, 2012
2012 lun Huang、Tingting Hual、Yufeng Guo、Yue Xu、Xiaojuan Xia、Ying Zhang、許健(Gene Sheu), Numerical Simulation of Static and Dynamic Operation Performance of SOl VLT LDMOS Considering Electrical-thermal Couple Effects, international workshop of junction technology, vol.2012 no.10 pp.156-159, 2012
2012 Anumeha、Adarsh、許健(Gene Sheu), Study of energy capability and failure of LDMOSFET at different ambient temperatures, ISCDG 2012, vol.2012 no.2012 pp.127-130, 2012
2011 Aloysius Priartanto Herlambang、許健(Gene Sheu)、郭宇鋒(Yufeng Guo)、Hutomo Suryo Wasistoa, LDMOS Thermal SOA Investigation of a Novel 800V Multiple RESURF with, ECS Transactions, vol.34 no.1 pp.979-984, 2011
2011 Hutomo Suryo Wasisto、許健(Gene Sheu)、楊紹明(Shao-Ming Yang)、Rudy Octavius Sihombing、Yufeng Guo, A Novel 800V Multiple RESURF LDMOS Utilizing, tencon 2010, vol.2010 no.2010 pp.75-77, 2011
2011 rudy Sihombing、許健(Gene Sheu)、hutomo wasisto、aloysius herambang, A 2-dimensional mesh study using sentaurus simulator, 2010 IRAST International Congress on Computer Applications and computational science, vol.2010 no.2010, 2011
2011 Rudy Octavius Sihombing、許健(Gene Sheu)、楊紹明(Shao-Ming Yang)、Hutomo Suryo Wasisto、Yu-Feng Guo, An 800 Volts High Voltage Interconnection Level, tencon 2010, vol.2010 no.2010 pp.71-74, 2011
2011 aloysius Herlambang、許健(Gene Sheu)、楊紹明(Shao-Ming Yang)、Priyono Sulistyanto, ESD simulation on GGNMOS for 40V BCD, tencon 2010, vol.2010 pp.978-990, 2011
2010 郭宇锋(GUO Yu-Feng)、王志功(WANG Zhi-Gong)、許健(Gene Sheu), A High Performance Silicon-on-Insulator LDMOSTT Using Linearly Increasing Thickness Techniques, CHINESE PHYSICS LETTERS, vol.27 no.6 pp.067301-1-067301-, 2010
2010 許健(Gene Sheu)、吳承炎(Cheng-yen Wu)、楊紹明(Shao-Ming Yang)、郭宇鋒(Yu-Feng Guo), Reduction of Kink Effect in SOI LDMOS Structure with Linear Drift Region Thickness, ECS Transactions, vol.27 no.1 pp.115-120, 2010
2010 許健(Gene Sheu)、林盈宏(Yin-Huang Lin)、曾文錦(Wen-Chin Tseng)、楊紹明(Shao-Ming Yang)、陳兆南、郭宇鋒(Yu-Feng Guo), Comparison of High Voltage (200-300 Volts) Lateral Power MOSFETs for Power Integrated Circuits, ECS Transactions, vol.27 no.1 pp.103-108, 2010
2010 林敬哲(Chin-Che Lin)、許健(Gene Sheu)、楊紹明(Shao-Ming Yang)、郭宇鋒(Yu-Feng Guob), Combining 2D and 3D Device Simulations for Optimizing LDMOS Design, ECS Transactions, vol.27 no.1 pp.125-129, 2010
2010 許健(Gene Sheu)、楊紹明(Shao-Ming Yang)、張怡楓(Yi-Fong Chan)、曹世昌(Shyh Chang Tsaur), An Analytical Model of Surface Electric Field Distributionsin in Ultrahigh-Voltage Metal–Oxide–Semiconductor Devices, JAPANESE JOURNAL OF APPLIED PHYSICS, vol.49 no.2010 pp.074301-1-074301-, 2010
2010 楊紹明(Shao-Ming Yang)、許健(Gene Sheu)、蔡宗叡(Jung-Ruey Tsai), A 5V/200V SOI Device with a Vertically Linear Graded Drift Region, ICSICT 2010, vol.2010 no.2010 pp.1838-1840, 2010
2009 許健(Gene Sheu)、楊紹明(Shao-Ming Yang)、曹世昌(Shyh-Chang Tsaur), An Analytical Model for Surface Electric Field Distributions in Ultra High Voltage (800V) Buried P-top LDMOS Devices, SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2009
2009 郭宇峰(Yufeng Guo)、Zhigong Wang、許健(Gene Sheu), A Three-dimensional Breakdown Model of SOI Lateral Power Transistors with a Circular Layout, Journal of Semiconductors, vol.30 no.11 pp.114006-1-114006-, 2009
2009 楊紹明(Shao-Ming Yang)、許健(Gene Sheu), The Reliability of 200V P-channel Silicon-On-Insulator LDMOS on High Side operation, APPLIED PHYSICS LETTERS, 2009
2009 許健(Gene Sheu)、楊紹明(Shao-Ming Yang)、曹世昌(Shyh-Chang Tsaur)、郭宇峰(Yu-Feng Guo), Comparison of High Voltage (200-300 Volts) Devices for Power Integrated Circuits, SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2009
2009 許健(Gene Sheu)、楊紹明(Shao-Ming Yang), A High Performance 80V Smart LDMOS Power Device Based on Thin SOI Technology, Semiconductor Science and Technology, vol.18 no.1 pp.123-124, 2009
2009 游信強(Hsin-Chiang You)、曹世昌(Shyh-Chang Tsaur)、許健(Gene Sheu), Simulation Details for the Electrical Field Distribution and Breakdown Voltage of 0.15μm Thin Film SOI Power Device, Semiconductor Science and Technology, vol.18 no.1 pp.129-133, 2009
2009 游信強(Hsin-Chiang You)、曹世昌(Shyh-Chang Tsaur)、許健(Gene Sheu), Simulation Details for the Electrical Field Distribution and Breakdown Voltage of 0.15μm Thin Film SOI Power Device, Semiconductor Science and Technology, vol.18 no.1 pp.129-133, 2009
2009 郭宇峰(Yufeng Guo)、Zhigong Wang、許健(Gene Sheu), A Three-dimensional Breakdown Model of SOI Lateral Power Transistors with a Circular Layout, Journal of Semiconductors, vol.30 no.11 pp.114006-1-114006-, 2009
發表日期 論文名稱
2012.09 Md. Imran Siddiquia、Abijith Prakasha、Mohammed Sadique Anwara、P.A Chen, Mechanism and Improvement of Breakdown Degradation Induced by Interface Charge in UHV , IEEE-ICSE2012 Proc., 2012, Sep. 2012, Kuala Lumpur, Malaysia
2012.09 Surya Kris Amethystna1、Karuna Nidhi1、楊紹明(Shao-Ming Yang)、許健(Gene Sheu), Characterization of NBTI by Evaluation of Hydrogen Amount in the Si/SiO2 Interface , IEEE-ICSE2012 Proc., 2012, Sep. 2012, Kuala Lumpur, Malaysia
2012.09 Karuna Nidhi、Neelam Agarwal、Purwardi, Failure Analysis of Power MOSFETs based on Multifinger Configuration under Unclamped Inductive , SISPAD 2012, Sep. 2012, Denver, CO, USA
2012.09 Anumeha、Adrash, Study of energy capability and failure of LDMOSFET at different ambient temperatures , ISCDG 2012, Sep. 2012, Grenoble,France
2012.09 adrash、Anumeha、許健(Gene Sheu), ISCDG 2012, Sep. 2012, Grenoble,France
2012.08 Optimization of ESD Protection Device Using SCR Structure of a Novel STI, sided LDMOS with P-top - 2012 International Conference on Optoelectronics and Microelectronics (ICOM), Aug. 2012, 中國 長春
2012.08 Prima POermatel、Mohammed Anwar、Md Siddiquil、楊紹明(Shao-Ming Yang), Analysis of LDMOS for Effect of Finger and Device, width on Gate Feedback - 2012 International Conference on Optoelectronics and Microelectronics (ICOM), Aug. 2012, 中國 長春
2009.12 Combining 2D and 3D Device Simulation for Optimizing LDMOS Design , 2009 IEEE International Conference on Electronics Circuits and Systems , Dec. 2009, Medina, Yasmine Hammamet -Tunisia
2009.08 Dependence of Breakdown Voltage on Drift Length and Linear Doping Gradients in SOI RESURF LDMOS Devices , 2009 ICEMI , Aug. 2009, Beijing,china
2009.07 郭宇鋒(Yufeng Guo)、王至剛(Zhigong Wang1)、許健(Gene Sheu), VARIATION OF LATERAL THICKNESSTECHNIQUES IN SOI LATERAL HIGH VOLTAGE DEVICE , 2009 International Conference on Communications, Circuits and Systems(ICCCAS2009) , Jul. 2009, San Jose, Milpitas
2009.05 許健(Gene Sheu)、楊紹明、許愉珊, A High Performance 80V Smart LDMOS Power Device Based on thin oxide technology , istc cstic 2009 , May. 2009, Shanghai
2009.03 Hsin-Chiang You、Yen-Ling Liu、Shyh-chang Tsaur、許健(Gene Sheu), Simulation Details for the Electrical Field Distribution and Breakdown Voltage of0.15μm Thin Film SOI Power Device , The Electrochemical Society Transaction 2009 (◎ISTC CSTIC 2009) , Mar. 2009, Shanghai
Reduced Kink Effect in An SOI LDMOS Structure with Graded Drift Region Thickness ,
a130615690,
計畫名稱 參與人 計畫期間
世界先進半導體公司委託研究 (20121112144247) 許健(Gene Sheu)、楊紹明(Shao-Ming Yang) 2012.10 ~ 2013.09
新唐科技委託研究 (20120302101742) 許健(Gene Sheu) 2011.09 ~ 2013.08
經濟部智慧電子學院 (經濟部智慧電子學院) 楊紹明(Shao-Ming Yang) 2011.03 ~ 2011.09
臺灣積體電路有限公司委託研究 (20120302101314) 許健(Gene Sheu) 2010.09 ~ 2012.08
與世界先進積體電路股份有限公司產學合作 (9700000198 ) 許健(Gene Sheu) 2009.05 ~ 2009.07
經濟部教育部產學合作碩士班 (經濟部教育部產學合作碩士班) 許健(Gene Sheu) 2008.09 ~ 2009.08
與世界先進積體電路股份有限公司產學合作 (9700000086 ) 許健(Gene Sheu) 2008.05 ~ 迄今
課程類別 課程代碼 課程名稱 年度
研究所碩士班 EE200016A 研究論文寫作 107
研究所碩士班 EE200147A Semiconductor Process Engineering 107
研究所碩士班 EE200172A Semiconductor Manufacturing Technology 107
發表日期 專利名稱 專利編號
2016/05/11 具有多重降低表面電場結構之橫向擴散金屬氧化物半導體及其製造方法 中華民國發明專利:I533456
2016/05/01 垂直式絕緣閘雙極電晶體及其製造方法 中華民國發明專利:I532179
2016/04/11 超級接面功率元件之主動晶胞結構及其製造方法 中華民國發明專利:I529927
2016/03/21 超級接面功率元件之耐壓終止結構及其製造方法 中華民國發明專利:I527098
2016/03/21 橫向擴散金屬氧化物半導體功率放大器及其製造方法 中華民國發明專利:I527235
2016/03/21 蕭基二極體結構 中華民國發明專利:I527098
2015/10/11 橫向式絕緣閘雙極電晶體及其製造方法 中華民國發明專利:I503972
2015/08/11 具P型頂環及溝槽區之降低表面電場半導體元件及其製造方法(原:Design of Multiple RESURF LDMOS with P-top rings and STI regions in 65 中華民國發明專利:I496289